Trainee Engineer - PD
QuEST Global
Job Requirements
Work Experience
PD Trainee Engineer
Role Summary:
We are looking for enthusiastic entry-level engineers to join our VLSI Physical Design (PD) team. As a trainee, you will learn and contribute to various stages of the chip design flow under the guidance of Lead engineers.
Key Responsibilities:
Assist in physical design activities such as floor planning, placement, clock tree synthesis, routing, and timing closure.Work with senior engineers to run EDA tools for design implementation and verification.Support design checks for power, performance, and area (PPA).Learn industry-standard flows for DRC, LVS, and STA.Document processes and contribute to knowledge sharing within the team.
Work Experience
Requirements:
B.E/B.Tech/M.Tech in ElectronicsBasic understanding of digital circuits and CMOS.Good analytical and problem-solving skills.Eagerness to learn VLSI PD flows and EDA tools.Strong teamwork and communication skills.Exposure to VLSI design flows through coursework, projects, or internships.Knowledge of scripting (TCL, Perl, Python, or Shell).
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