Job Requirements
9-10 years’ experience with Bachelor’s degree in Electronics Engineering or equivalentGood experience in Physical Design with innovus toolHands-on experience in developing and modifying PD-flow/EDA-tools scripts/recipes using TCL/SHELL/PYTHON programming languages.Experience in developing PD metrics dashboard scripts for QOR tracking is a plus   Experience in modifying STA constraints to check timing closure feasibilityExperience in various clock implementation strategies (Multi-point CTS, Flex-H, Custom-CTS) for meeting block level and full chip level latency and skew targetsExperience in FinFET & Dual Patterning nodes such as 16/14/10/7/5/3nmStrong leadership skills to lead a team of physical design engineers in the development and execution of complex projectsProven track record of delivering high-quality physical design solutions within tight deadlinesAbility to collaborate effectively with cross-functional teams to ensure successful project outcomes