Introduction
The DUV defectivity group focuses on the optimization of the defectivity* performance of ASML DUV systems. They are part of the Defectivity and Optics Lifetime Performance cluster. The main work focuses on system design qualifications and assessing scanner performance during integration phase. We develop wafer qualification and diagnostic tests, defectivity analysis tooling and models and provide input to the HW teams to improve their designs for improved defectivity performance.
*Defects are expressed as particles, damages, watermarks or bubbles on wafers, reticles and other particle sensitive surfaces causing deviations from the intended pattern on the wafer surface, therefore limiting production yield.
The goal of this assignment is to get a better understanding on the material properties on the micro- and nanoscale of the typical wafers backsides used in the semiconductor industry. More specifically the physical limits that typical wafer backsides (Si, SiOx, SiN, poly-Si) can endure without critical failure (e.g. crack growth, material chip out or in worst case breakage).
Key deliverables include:
Perform literature investigation relating wafer backside damage and contamination.
Determine a suitable test setup to assess the failure modes of wafer backside coatings.
Measure the material properties of the typical wafer backside materials (Si, SiOx, SiN, poly-Si…).
Test the different wafer backsides in a representative matter to determine their physical limits.
This is a master internship and/or thesis internship for minimum 5 months, minimum 5 days per week (minimum 3 days on-site). The start date of this internship is as soon as possible.
To be a fit for this assignment, you:
Have a background in physics, material science, or a related field.
Have experience in data analysis and conducting experiments
Have great communication skills (english spoken and written)
Are a team player and are proactive
Other requirements you need to meet
You are enrolled at an educational institute for the entire duration of the internship;
You need to be located in the Netherlands to be perform your internship. In case you ‘re currently living/studying outside of the Netherlands, your CV/motivation letter includes the willingness to relocate.
If you are a non-EU citizen, studying in the Netherlands, your university is willing to sign the documents relevant for doing an internship (i.e., Nuffic agreement).
Diversity and inclusionASML is an Equal Opportunity Employer that values and respects the importance of a diverse and inclusive workforce. It is the policy of the company to recruit, hire, train and promote persons in all job titles without regard to race, color, religion, sex, age, national origin, veteran status, disability, sexual orientation, or gender identity. We recognize that diversity and inclusion is a driving force in the success of our company.
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