Physical Design Technical Leader
Cisco
Physical Design Technical Leader
Apply (https://jobs.cisco.com/jobs/Login?projectId=1446643)
+ Location:Yerevan, Armenia
+ Area of InterestEngineer - Hardware
+ Job TypeProfessional
+ Technology Interest*None
+ Job Id1446643
New
**Meet the Team**
Join Cisco’s CHG Team in Armenia, a leader in physical design and implementation for groundbreaking networking chips under the globally recognized Silicon One brand. Our team focuses on advancing chip-level implementation and analysis for innovative technologies, employing advanced methodologies and best-in-class tools to solve large-scale design challenges. As a part of this innovative team, you’ll lead and collaborate on the physical implementation and sign-off of high-complexity silicon, ensuring the performance, reliability, and quality of the technology that powers tomorrow’s connectivity. Together, we are redefining what’s possible in networking technology.
**Your Impact**
As a Physical Design Manager, you will play a key leadership role in Cisco’s Silicon One development, overseeing the full physical implementation process from RTL to GDSII and tape-out. You will drive the team responsible for block-level and full-chip design, ensuring that all aspects meet rigorous performance, area, and power requirements. In this role, you’ll collaborate cross-functionally with teams spanning frontend, IP, and tool vendors, both locally and globally, to deliver signoff-clean, next-generation networking chips. Beyond technical leadership, you’ll foster a culture of mentorship, learning, and innovation—enabling your team and yourself to grow and make a real-world impact.
**What You'll Do**
+ Lead the team responsible for full-chip and block-level physical implementation, from RTL to GDSII and tape-out.
+ Oversee all aspects of the physical design process, including synthesis, place and route, timing closure, and sign-off.
+ Ensure all designs meet performance, area, and power requirements, and that handoffs between teams are seamless and timely.
+ Collaborate closely with cross-functional teams to align on implementation challenges and solutions.
+ Provide technical leadership, mentorship, and support to team members, empowering their growth and success.
+ Engage in strategic planning and contribute ideas to optimize physical design methodologies and workflows.
**Minimum Qualifications**
+ Bachelor’s or Master’s degree in Electrical Engineering, Computer Science, or a related field.
+ 8+ years of experience in ASIC design and physical implementation, including verification.
+ Deep expertise with deep submicron CMOS technologies.
+ Extensive knowledge of the full design cycle from RTL to GDSII.
+ Strong understanding of Static Timing Analysis, timing closure, and design constraints.
+ Proven skills in block-level synthesis, place and route, and timing closure.
+ Familiarity with industry-standard physical design and sign-off tools.
+ Excellent verbal and written communication skills in English.
+ Proven experience managing technical teams in a fast-paced environment.
**Preferred Qualifications**
+ Direct experience with EM/IR and ESD analysis, including debugging and solution development.
+ Proficiency in scripting languages such as Tcl, Python, or Shell to improve design flow efficiency.
+ Experience collaborating with global teams and vendor partners.
+ Demonstrated ability to mentor team members and foster a collaborative environment.
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**Message to applicants applying to work in the U.S. and/or Canada:**
When available, the salary range posted for this position reflects the projected hiring range for new hire, full-time salaries in U.S. and/or Canada locations, not including equity or benefits. For non-sales roles the hiring ranges reflect base salary only; employees are also eligible to receive annual bonuses. Hiring ranges for sales positions include base and incentive compensation target. Individual pay is determined by the candidate's hiring location and additional factors, including but not limited to skillset, experience, and relevant education, certifications, or training. Applicants may not be eligible for the full salary range based on their U.S. or Canada hiring location. The recruiter can share more details about compensation for the role in your location during the hiring process.
U.S. employees haveaccess (https://www.cisco.com/c/en/us/about/careers/we-are-cisco/benefits-and-perks.html) to quality medical, dental and vision insurance, a 401(k) plan with a Cisco matching contribution, short and long-term disability coverage, basic life insurance and numerous wellbeing offerings.
Employees receive up to twelve paid holidays per calendar year, which includes one floating holiday (for non-exempt employees), plus a day off for their birthday. Non-Exempt new hires accrue up to 16 days of vacation time off each year, at a rate of 4.92 hours per pay period. Exempt new hires participate in Cisco’s flexible Vacation Time Off policy, which does not place a defined limit on how much vacation time eligible employees may use, but is subject to availability and some business limitations. All new hires are eligible for Sick Time Off subject to Cisco’s Sick Time Off Policy and will have eighty (80) hours of sick time off provided on their hire date and on January 1st of each year thereafter. Up to 80 hours of unused sick time will be carried forward from one calendar year to the next such that the maximum number of sick time hours an employee may have available is 160 hours. Employees in Illinois have a unique time off program designed specifically with local requirements in mind. All employees also have access to paid time away to deal with critical or emergency issues. We offer additional paid time to volunteer and give back to the community.
Employees on sales plans earn performance-based incentive pay on top of their base salary, which is split between quota and non-quota components. For quota-based incentive pay, Cisco typically pays as follows:
.75% of incentive target for each 1% of revenue attainment up to 50% of quota;
1.5% of incentive target for each 1% of attainment between 50% and 75%;
1% of incentive target for each 1% of attainment between 75% and 100%; and once performance exceeds 100% attainment, incentive rates are at or above 1% for each 1% of attainment with no cap on incentive compensation.
For non-quota-based sales performance elements such as strategic sales objectives, Cisco may pay up to 125% of target. Cisco sales plans do not have a minimum threshold of performance for sales incentive compensation to be paid.
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Cisco will consider for employment, on a case by case basis, qualified applicants with arrest and conviction records.
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