Lead design verification engineer
QuEST Global
Job Requirements
Work Experience
Be part of team to build custom SOC/IP for next generation devices. The position involves solving difficult DV problems, make room for innovation. You will be working on all aspects of IP/SOC from RTL simulation to post silicon support.
Work Experience
Expert in IP verification.
Excellent in SV/UVM
Experience in C based environment with ARM/DSP
Experience in post silicon/Emulation is big plus.
Good communication skills and ability to lead big team and project.
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