Qorvo (Nasdaq: QRVO) supplies innovative semiconductor solutions that make a better world possible. We combine product and technology leadership, systems-level expertise and global manufacturing scale to quickly solve our customers' most complex technical challenges. Qorvo serves multiple high-growth segments of large global markets, including consumer electronics, smart home/IoT, automotive, EVs, battery-powered appliances, network infrastructure, healthcare and aerospace/defense. Visit www.qorvo.com to learn how our innovative team is helping connect, protect and power our planet.
Position Overview:
As a Sr. Layout Design Engineer at Qorvo, you will play a critical role in the development of advanced RFICs and mixed-signal ICs. You will collaborate with cross-functional teams to deliver high-quality layouts for tapeout across multiple semiconductor technologies including SiGe, CMOS, SOI, GaN, and GaAs.
Key Responsibilities:
Partner with design engineers to create IC layouts for tapeout in advanced RF and analog technologies. Perform layout of RF, analog, and mixed-signal integrated circuits for high-performance RFICs. Execute chip-level and block-level floor planning and layout realization for complex RF/analog/digital designs. Conduct top-level and block-level layout verification including LVS, DRC, and ERC checks. Optimize analog layout designs for performance, area, and manufacturability. Lead tapeout activities, including documentation, archiving, and development of training materials for layout processes. Collaborate with design and process engineering teams to evaluate new product designs for manufacturability and yield. Develop and implement design-for-manufacturing (DFM) guidelines and best practices. Analyze production data to identify yield-limiting factors and recommend design or process improvements. Support root cause analysis and corrective actions for manufacturing issues. Document producibility assessments and maintain technical reports and recommendations.
Required Qualifications:
Bachelor’s degree in Electrical Engineering or related field, or equivalent experience. 10+ years of experience in IC layout design, preferably in RF and analog domains. Strong understanding of analog and mixed-signal IC design fundamentals. Experience with advanced CMOS process technologies and flows (bulk and SOI). Proficiency in layout tools such as Cadence Virtuoso, PVS, Pegasus; and RF simulation tools like AWR and Keysight ADS. Familiarity with Linux and Windows environments; scripting experience in Shell, Skill, Perl, or Python is a plus. Excellent problem-solving skills and attention to detail. Self-motivated with a strong ability to work independently and collaboratively in a fast-paced team environment.
Preferred Qualifications:
Experience with layout of high-frequency RF blocks such as LNAs, mixers, VCOs, and PAs. Knowledge of ESD and latch-up prevention techniques. Exposure to design for manufacturability (DFM) and reliability best practices. Experience with statistical analysis tools and methodologies (e.g., SPC, DOE, FMEA). Proficiency in data analysis tools such as Excel, or Python.
This position is not eligible for visa sponsorship by the Company.
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MAKE A DIFFERENCE AT QORVO
We are Qorvo. We do more than create innovative RF and Power solutions for the mobile, defense and infrastructure markets – we are a place to innovate and shape the future of wireless communications. It starts with our employees. As a unified global team, we bring a commitment to excellence, growth and a passion for creating what's next. Explore the possibilities with us.
We are an Equal Employment Opportunity (EEO) employer and welcome all qualified applicants. Applicants will receive fair and impartial consideration without regard to any characteristics protected by applicable law, including race, color, religion, sex (as defined by law), national origin, age, military or veteran status, genetic information, or disability.