Company:Qualcomm Technologies, Inc.Job Area:Engineering Group, Engineering Group > ASICS Engineering
General Summary:
As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives communication, AI, and data processing transformation to help create a smarter, connected future for all. As a Qualcomm ASIC Engineer, you will define, model, design (digital and/or analog), optimize, verify, validate, implement, and document IP (block/SoC) development for a variety of high performance, high quality, low power world class products. Qualcomm Engineers collaborate with cross-functional groups to determine product execution path.
Key Responsibilities:
PPAC assessment for System-Technology Co-Optimization (STCO) for new product developmentChiplet solution pathfinding and developmentCustom DRAM integration technology evaluation and pathfindingSystem KPI assessment and development of advanced system PDN solutions3D SRAM design evaluation and process pathfindingMinimum Qualifications:
• Bachelor's degree in Science, Engineering, or related field and 6+ years of ASIC design, verification, validation, integration, or related work experience.OR
Master's degree in Science, Engineering, or related field and 5+ years of ASIC design, verification, validation, integration, or related work experience.
OR
PhD in Science, Engineering, or related field and 4+ years of ASIC design, verification, validation, integration, or related work experience.
Preferred Qualifications:
Master's degree in Electrical/Electronic Engineering, Computer Engineering, or Computer Science.Experience with 2.5D and 3D STCO and pathfindingFamiliarity with heterogeneous integration processes such as hybrid bonding, wafer bonding, TSV, backside metallizationProduct development experience with TSMC SoIC and/or CoWoSExperience with 2.5D/3D IC design flow and PDK developmentSystem PDN design and analysis expertiseProcess development and/or system and product development experience with advanced technology (sub 4nm) and its PPAC assessmentCustom layout, svrf, scripting skillsSystem and/or chip-level architecture design experience for 3D cache partitioning (a plus)Familiarity with system Power Integrity (PI) and Signal Integrity (SI) and hands-on design experience (a plus)Hands-on experience with DRC, LVS, PEX (a plus)Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability-accomodations@qualcomm.com or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries).
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Pay range and Other Compensation & Benefits:
$164,000.00 - $246,000.00The above pay scale reflects the broad, minimum to maximum, pay scale for this job code for the location for which it has been posted. Even more importantly, please note that salary is only one component of total compensation at Qualcomm. We also offer a competitive annual discretionary bonus program and opportunity for annual RSU grants (employees on sales-incentive plans are not eligible for our annual bonus). In addition, our highly competitive benefits package is designed to support your success at work, at home, and at play. Your recruiter will be happy to discuss all that Qualcomm has to offer – and you can review more details about our US benefits at this link.
If you would like more information about this role, please contact Qualcomm Careers.