Kforce's client, a fast-growing technology company delivering innovative communications products and services worldwide, is seeking a experienced Hardware Design/Verification Engineer (FPGA, UVM) in Marlborough, MA. In this role, the Hardware Design/Verification Engineer will work alongside a collaborative team of engineers developing the next generation of advanced communications systems. Key Responsibilities: * Develop high-speed signal processing algorithms and network protocols in FPGAs * RTL design verification using SystemVerilog/UVM * Develop UVM testbenches for verifying FPGA designs * Write and debug test cases * Participate in design/code reviews and manage UVM code revisions * Own and resolve technical issues throughout the verification process