Job Description An employer in the Plymouth, MN area is seeking a secret cleared Sr. FPGA Design Engineer. This candidate should have previous experience with FPGA and DSP, and would be a lead over a team of 3-4. Performing FPGA designs, simulation and documentation using product families like Xilinx Kintex7, Virtex7, Zynq, Ultrascale, RFSoc and Altera Agilex, Arria 10, and Max 10. They should recognize and address unique design requirements such as safety and reliability architectures for military applications and ensure adherence to coding standards and revision control practices We are a company committed to creating diverse and inclusive environments where people can bring their full, authentic selves to work every day. We are an equal opportunity/affirmative action employer that believes everyone matters. Qualified candidates will receive consideration for employment regardless of their race, color, ethnicity, religion, sex (including pregnancy), sexual orientation, gender identity and expression, marital status, national origin, ancestry, genetic factors, age, disability, protected veteran status, military or uniformed service member status, or any other status or characteristic protected by applicable laws, regulations, and ordinances. If you need assistance and/or a reasonable accommodation due to a disability during the application or recruiting process, please send a request to HR@insightglobal.com.To learn more about how we collect, keep, and process your private information, please review Insight Global's Workforce Privacy Policy: https://insightglobal.com/workforce-privacy-policy/. Skills and Requirements Active Secret Clearance B.S. in electrical engineering or computer engineering 8 years of relevant experience, or Master's + 6 years or PhD + 4 years. Experience in FPGA design and development - utilizing VHDL or Verilog Experience with simulation tools Experience with FPGA design verification using hardware verification & debugging Experience with bus protocols such as I2C, SPI, RS-232, JESD204B, CSI/MIPI. VHDL is the preferred HDL. Experience with digital implementations of DSP functions (low pass, bandpass, high pass filters, etc.). Experience with Intel Agilex, Arria 10, and Max 10. Experience with Modelsim, Xilinx Vivado, Xilinx Model Composer, Synplicity, MATLAB, Altera Quartus, Altera DSP Builder, Simulink, HDL Coder. IP creation and integration; FPGA DSP implementations. Experience with bus functional models. Full product life cycle experience (design, implementation, and test) of FPGA design. Familiarity with test requirements for military electronics (extreme temperature testing). Understanding of Six Sigma disciplines; DFA/DFM is a plus