Software/Firmware Engineer Location: Clackamas, OR Start Date: TBD Duration: 4-month contract with potential opportunity for extension Urgency: Extremely urgent, the team is already behind on this sensor upgrade project. Summary This is a 4-month contract opportunity supporting Astronics PECO’s Enhanced Vision System (EVS) product line. The role focuses on merging legacy and new camera firmware, optimizing I2C communication with a new FPGA module, and supporting calibration routines. The engineer will play a key role in restoring development momentum and enabling integration of next-generation sensor technology into a safety-critical aerospace product. Key Responsibilities - Merge legacy and new PIC firmware into a unified, reusable codebase. - Abstract shared functions into a common library for use across designs. - Update and optimize I2C communication between microcontroller and FPGA. - Support development of the FPGA-side I2C interface. - Assist with rotation-station calibration and sensor data integration. Ideal Background - Strong experience in embedded C/C++ development. - Familiarity with I2C protocols and hardware-level communication. - Experience with interrupt-driven programming and firmware refactoring. - Exposure to FPGA systems and SystemVerilog is a plus. - Comfortable working with legacy code and embedded testing environments. - Experience using Git in collaborative development workflows. Education Bachelor’s degree in Electrical Engineering, Computer Engineering, or related field. Equivalent training and experience also considered. Other Requirements Must be a U.S. Person (citizen or permanent resident) due to ITAR regulations. Pre-employment background and drug screening (including cannabis) required. Skills Embedded C, Embedded C++, I2C, Microcontroller, Git, sensor technology, troubleshooting, debugging, c/c++, firmware, embedded system, rtos, systemverilog, fpga, code refactoring, embedded system testing, legacy code, existing code, embedded software test, hardware/software integration, controls design Additional Skills & Qualifications + Industry Experience: Aerospace or Defense experience is beneficial. Experience designing camera systems or displays for aerospace is a strong plus. However, candidates from other safety-critical industries (automotive camera systems, medical imaging, etc.) can also bring relevant experience. + SystemVerilog: While not a core requirement, familiarity with SystemVerilog supports collaboration with FPGA engineers and helps in understanding the hardware interface layer. + FPGA: Understanding FPGA behavior is essential for optimizing I2C communication and ensuring the firmware properly interfaces with the new FPGA module. + Embedded System Testing: Testing is critical to validate firmware functionality in real-world conditions, especially for sensor calibration and communication timing. + Existing Code: Much of the work involves modifying and extending existing firmware, so familiarity with maintaining and improving current code is essential. + Embedded Software Test: The engineer will need to verify that firmware changes meet performance and reliability standards through structured embedded testing. Pay and Benefits The pay range for this position is $55.00 - $72.00/hr. Eligibility requirements apply to some benefits and may depend on your job classification and length of employment. Benefits are subject to change and may be subject to specific elections, plan, or program terms. If eligible, the benefits available for this temporary role may include the following: • Medical, dental & vision • Critical Illness, Accident, and Hospital • 401(k) Retirement Plan – Pre-tax and Roth post-tax contributions available • Life Insurance (Voluntary Life & AD&D for the employee and dependents) • Short and long-term disability • Health Spending Account (HSA) • Transportation benefits • Employee Assistance Program • Time Off/Leave (PTO, Vacation or Sick Leave) Workplace Type This is a fully onsite position in Clackamas,OR. Application Deadline This position is anticipated to close on Aug 29, 2025. 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