**Summary:** The Infra Silicon team at Meta is responsible for designing and building in-house hardware accelerator Application-Specific Integrated Circuits (ASICs) to enhance Meta's computing proficiency with superior capacity and efficiency at lower power and cost. The team focuses on creating domain-specific System on Chips (SoCs) that enable Meta's data centers to execute computationally-intensive workloads, such as video transcoding and AI/ML, with higher performance and lower energy consumption. They are organized into several key areas, including architecture & algorithms, design & micro-architecture, design verification, implementation & backend design, emulation/prototyping, and system on chip (SoC), which collaborate extensively with other teams to deliver comprehensive solutions for various technical domains. **Required Skills:** Design Verification Engineer Responsibilities: 1. Develop functional tests based on verification test plan 2. Drive Design Verification to closure based on defined verification metrics on test plan, functional and code coverage 3. Debug, root-cause and resolve functional failures in the design, partnering with the design/arch team 4. Collaborate with cross-functional teams like Design, Model, Emulation and Silicon validation teams towards ensuring the highest design quality **Minimum Qualifications:** Minimum Qualifications: 5. Currently has, or is in the process of obtaining a Bachelor's degree in Electronics Engineering, Computer Engineering, Computer Science, Very Large Scale Integration (VLSI), relevant technical field, or equivalent practical experience. Degree must be completed prior to joining Meta 6. Experience using constrained-random, coverage driven verification or C/C++ verification 7. Experience in verifying a IP block using standard Design Verification (DV) based techniques 8. Experience in Electronic Design Automation (EDA) tools and scripting (Python, Tool Command Language (TCL), Perl, Shell) used to build tools and flows for verification environments 9. Understanding in at least one of the following areas: computer architecture, Central Processing Unit (CPU), Graphics Processing Unit (GPU), networking, interconnects, fabrics or similar designs **Preferred Qualifications:** Preferred Qualifications: 10. Experience debugging fails to the line of RTL, closing out bug fixes, using Verdi or equivalent debug tools 11. Experience with revision control systems like Mercurial(Hg), Git or SVN 12. Experience working in a CPU/GPU environment 13. Currently has, or is in the process of obtaining, a Master’s degree in Electronics Engineering, Computer Engineering, Computer Science or similar technical field 14. Experience in development of SystemVerilog/UVM based verification environments from scratch 15. Experience in verification of any peripheral IPs like UART, SPI, I2C and exposure to protocols like APB, AXI **Industry:** Internet